Senior Digital Designer/Expert (SerDes)

· Requirements:
1. 8+ years in High-speed SerDes (such as PCIe/Ethernet/MIPI/USB) PHY design.
2. Proven track record in Interface Adaptation and Digital Circuit Integration.
3. Expert knowledge of SerDes specs and PAM4/NRZ digital logic.
4. Experience in implementing Word Alignment, Scrambling, Calibration, and Training ...etc.,
5. Strong CDC/RDC design skills for high-speed, multi-clock interfaces.
· Job Description:
1. Lead the implementation and integration of the PHY Digital Circuit.
2. Synchronize digital signals between the Controller and the PHY Analog Front-End.
3. Implement and optimize the Controller-PHY interface for robust data handshaking.
4. Define the Clock/Reset architecture and related constraint.
5. Ensure stable Link-up at maximum line rates for the digital physical layer.