Digital Design Engineer/Expert

Job Description:
1. Develop peripheral logic for the Controller.
2. Maintain Register Maps and integrate with SoC management buses (APB/AXI-Lite).
3. Execute and fix static check violations (Lint/CDC) for the Controller logic.
4. Document technical manuals for developed RTL modules to support team-wide knowledge sharing.
5. Assist in RTL integration and release management for the SoC top-level.
Requirements:
1. Related fields with 1–2 years of experience in High-Speed Interface or Serdes.
2. Solid foundation in digital circuits and Verilog/SystemVerilog programming.
3. Basic understanding of AMBA AXI/APB bus protocols is preferred.
4. Proficient in Linux/Unix environments and shell scripting.
5. Strong willingness to learn complex specifications and interface standards.