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Molding PE(半导体封装)

1-1.8万·14薪
  • 上海
  • 3-5年
  • 本科
  • 全职
  • 招1人

职位描述

MOLDING塑封半导体封装IGBT封装英语流利电子/半导体/集成电路
a. Requirements
1) University graduated major in Physics, Chemistry, mechanical engineering, Electronics engineering, material science, or equivalent
2) Min 3 years' experience in Discrete or Module semiconductor mold, trim and form process
3) Epoxy mold compound properties and its reliability failures knowledge
4) Trim/From mechanical design understanding against delamination, package crack and bent lead
5) JMP, Minitab DOE or other statistical analysis skill will get advantages
6) Be familiar with design, process FMEA, Control plan generation
7) In-depth knowledge of power electronic packages and processes
8) Fundamental understanding of package design and material properties
9) Knowledge of power packages processes
10) Understanding of semiconductor material properties and their influence on semiconductor device behavior
11) Able to understand thermo/mechanical simulation and JMP data analysis tools is strongly desired
12) Excellent interpersonal, verbal, and written English communication skills
13) Ability to demonstrate great attention to detail
14) Are a proven self-starter
b. Job description
1) Responsible from design review of new products, participate Package
and substrate(Lead frame and DBC) design review, optimize design, process characterization, generate related spec and work instruction, to be owner of qualification and customers samples to complete product qualification, initial training of operation
2) Lead potential failure modes review to define RPN into DFEMA and find counter measure to optimize design for yield, cost, quality, reliability, manufacturability, cycle time
3) Lead supplier to design required tools and jig such like mold die, trim/form dies, magazine, tubes, or tray
4) Characterize and generate report for mold , trim and from related failure modes and key parameters of output variables according to D/PFMEA
5) Optimize process recipe, parameters, tools, jigs to meet die attach cost, quality, yield, UPH, reliability, manufacturability to hands over to operation department
6) Validate design rule by process characterization
7) Generate process quality specs, recipe, D/PFMEA, Control plan, work instruction to train operation
8) Resolve technical issues from characterization, qualification, and customer samples
9) Owner of correspond process to meet required process success criteria
10) Generate new equipment PO spec leading cross functional team from operation and support department
职位福利:五险一金、年底双薪、包吃、包住、带薪年假、免费停车、周末双休、免费班车
职位亮点:海外IGBT封装研发团队,Molding
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奖金绩效

年终奖金

工作地点

工作地点
上海浙江省嘉兴市秀洲区恒诺路18号
位置图标
完善简历

公司信息

恒诺微电子(嘉兴)有限公司

已上市 · 1000-9999人 · 电子/半导体/集成电路、电子/半导体/集成电路 已审核 已审核

公司介绍

恒诺集团公司简介:恒诺集团是世界领先的电子产品制造服务跨国集团,集团成立于1978年,并于1993年在泰国证劵交易所股票上市。公司提供IC封装、微电子装配及测试服务,在中国、美国、泰国、德国、柬埔寨和香港等六个国家和地区设有工厂和办事处。公司每年以不低于25%的年增长率不断发展,至今已发展成为一个拥有11,000多名员工的跨国企业。 恒诺微电子(嘉兴)有限公司简介:恒诺微电子(嘉兴)有限公司占地面积约200亩,厂房面积约30,000平方米,现有雇员2,500余人;公司坐落在嘉兴市秀洲工业区,地处长江三角洲上的中心地带,到上海、苏州、杭州的时间均在一个小时左右,交通便捷。公司属高科技制造型企业,提供微电子装配测试和IC封装测试,主要生产工艺有:Integrated Circuit (IC&IGBT power module) Assembly and Test, Chip-On-Board (COB), Chip-On-Flex, Surface-Mount (SMT), Micro-Coil Winding, Printed Circuit Board Assembly (PCBA), Opto Electronics Assembly, Box Built Product Assembly, Hybrid Module Assembly and RFID Card Lamination公司目前处于上升发展阶段,给有志于微电子和半导体制造的应聘人士提供众多的岗位和良好的职业发展机会,公司配有宿舍、医务室、篮球场、足球场、员工超市、健身房、娱乐室、图书馆、班车等生活设施,并为员工缴纳五险一金。

工商信息

企业名称 恒诺微电子(嘉兴)有限公司
企业类型 有限责任公司(外国法人独资)
法人代表 理查德.大卫.韩
经营状态 存续
成立时间 2003-12-17
注册资本 9500万美元
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